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Module Ast.Operand

module Bitmask : sig ... end
module Shift : sig ... end
module Lsl_by_multiple_of_16_bits : sig ... end

LSL shift positions for MOVK/MOVN/MOVZ instructions. These position a 16-bit immediate within the register. Architecturally constrained to {0,16,32,48} for X-form and {0,16} for W-form. The GADT encodes this: S32 and S48 are only valid for X.

module Shift_by_element_width : sig ... end

Shift amount for vector shift instructions (SHL, SSHR, USHR). The valid range depends on element width:

type _ t = private
  1. | Imm : 'w Immediate.t -> [ `Imm of 'w ] t
  2. | Reg : 'a Reg.t -> [ `Reg of 'a ] t
  3. | Lsl_by_twelve : [ `Fixed_shift of [ `Lsl_by_twelve ] ] t
  4. | Shift : ('op, 'amount) Shift.t -> [ `Shift of 'op * 'amount ] t
  5. | Lsl_by_multiple_of_16_bits : 'w Lsl_by_multiple_of_16_bits.t -> [ `Lsl_by_multiple_of_16_bits of 'w ] t
  6. | Shift_by_element_width : 'w Shift_by_element_width.t -> [ `Shift_by_element_width of 'w ] t
  7. | Cond : Cond.t -> [ `Cond ] t
  8. | Float_cond : Float_cond.t -> [ `Float_cond ] t
  9. | Mem : 'm Addressing_mode.t -> [ `Mem of 'm ] t
  10. | Bitmask : Bitmask.t -> [ `Bitmask ] t
  11. | Optional : 'a t option -> [ `Optional of 'a option ] t
  12. | Unit : unit t

Convenience type aliases for common operand patterns

type 'w gp = [ `Reg of [ `GP of 'w ] ] t

GP register operand

type 's neon_scalar = [ `Reg of [ `Neon of [ `Scalar of 's ] ] ] t

Neon scalar register operand

type ('arr, 'w) neon_vector = [ `Reg of [ `Neon of [ `Vector of 'arr * 'w ] ] ] t

Neon vector register operand with arrangement and element width