Module Reg
module Name : sig ... endmodule Stamp : sig ... endand stack_location = | Local of int| Incoming of int| Outgoing of int| Domainstate of int
val dummy_for_regalloc : tval create_with_typ : t -> tval create_with_typ_and_name : ?prefix_if_var:string -> t -> tval createv_with_typs : t array -> t arrayval createv_with_typs_and_id : id:Ident.t -> t array -> t arrayval is_unknown : t -> boolval is_preassigned : t -> boolval is_domainstate : t -> boolval disjoint_set_array : Set.t -> t array -> boolval set_of_array : t array -> Set.tval set_has_collisions : Set.t -> boolval all_relocatable_regs : unit -> t listval clear_relocatable_regs : unit -> unitval reinit_relocatable_regs : unit -> unitval same : t -> t -> boolval compare : t -> t -> intval same_loc : t -> t -> boolval same_loc_fatal_on_unknown : fatal_message:string -> t -> t -> boolval compare_loc : t -> t -> intval compare_loc_fatal_on_unknown : fatal_message:string -> t -> t -> intval is_of_type_addr : t -> bool