Module `Regalloc_interf_graph.BitMatrix`

Alternative bit matrix representation for edge sets.

This module provides the same interface as EdgeSet but uses a compact bit matrix stored in a bytes value. Since the interference graph is symmetric, only the upper triangle is stored (edges where i < j).

Memory usage: O(n²/8) bytes where n is the number of registers. This is more compact than EdgeSet for dense graphs.

Trade-offs compared to EdgeSet:

Smaller memory footprint (n²/8 bytes vs hash table overhead)
Better cache locality for membership testing
O(n²) cardinal operation (vs O(1) for EdgeSet)
O(n²) iter operation (vs O(edges) for EdgeSet)

type t

val make : num_registers:int -> t

val clear : t -> unit

val mem : t -> Edge.t -> bool

val add : t -> Edge.t -> unit

val capacity : t -> int

module For_debug : sig ... end

Module Regalloc_interf_graph.BitMatrix

Module `Regalloc_interf_graph.BitMatrix`