jon.recoil.org

Module Vectorize_utils.Memory_access

module Init_or_assign : sig ... end
type desc =
  1. | Alloc
  2. | Arbitrary
  3. | Read of {
    1. width_in_bits : Width_in_bits.t;
    2. addressing_mode : Arch.addressing_mode;
    3. is_mutable : bool;
    4. is_atomic : bool;
    }
  4. | Write of {
    1. width_in_bits : Width_in_bits.t;
    2. addressing_mode : Arch.addressing_mode;
    3. init_or_assign : Init_or_assign.t;
    }
  5. | Read_and_write of {
    1. width_in_bits : Width_in_bits.t;
    2. addressing_mode : Arch.addressing_mode;
    3. is_atomic : bool;
    }
type t
val create : ?first_memory_arg_index:int -> desc -> t
val desc : t -> desc
val first_memory_arg_index : t -> int
val alignment_in_bytes : t -> int

Base address of memory access t is guaranteed to be aligned to at least alignment_in_bytes t.