Module Regalloc_stack_slots
val make : unit -> tval iter : t -> f:(Reg.Tbl.key -> int -> unit) -> unitval total_number_of_slots : t -> intval get_and_incr : t -> stack_class:Stack_class.t -> slotval update_cfg_with_layout : t -> Cfg_with_layout.t -> unitval optimize : t -> Cfg_with_infos.t -> unitReduces the number of slots, by merging slots whose use intervals do not overlap. If a reduction occurs, registers are modified and liveness is invalidated, but the CFG is left untouched.