Module `Regalloc_rewrite`

module type State = sig ... end

module type Utils = sig ... end

val rewrite_gen : 
  (module State with type t = 's) ->
  (module Utils) ->
  's ->
  Cfg_with_infos.t ->
  spilled_nodes:Reg.t list ->
  block_temporaries:bool ->
  Reg.t list * Reg.t list * bool

val prelude : 
  (module Utils) ->
  on_fatal_callback:(unit -> unit) ->
  Cfg_with_infos.t ->
  Regalloc_utils.cfg_infos * Regalloc_stack_slots.t * Regalloc_affinity.t

val postlude : 
  (module State with type t = 's) ->
  (module Utils) ->
  's ->
  f:(unit -> unit) ->
  Cfg_with_infos.t ->
  unit

Module Regalloc_rewrite

Module `Regalloc_rewrite`